Multi-Channel
Base/Medium/Full/Deca
FPGA Processing
Model | Camera Link Configuration | Line | Area | FPGA | System BUS | Remark |
APX-3326A | Base/Medium/Full/Deca × 2ch | ● | ● | PCI Express2.0 x4 | ||
APX-3324A | Base × 4ch | ● | ● | PCI Express 2.0 x4 | ||
APX-3323 | Base/Medium/Full/Deca x 1ch | ● | ● | PCI Express 2.0 x4 | ||
APX-3323MDR | Base/Medium/Full/Deca × 1ch | ● | ● | PCI Express 2.0 x4 | MDR Connector | |
APX-3327-1-260 | Base/Medium/Full/Deca × 1ch | ● | ● | ● | PCI Express 2.0 x4 | FPGA Processing |
APX-3302 | Base × 2ch | ● | ● | PCI Express 2.0 x4 | Low Profile | |
APX-3302MDR | Base × 2ch | ● | ● | PCI Express 2.0 x4 | MDR Connector | |
APX-3307-260 | Base × 2ch | ● | ● | ● | PCI Express 2.0 x4 | FPGA Processing/Low Profile |